555 Timer – A Complete Basic Guide

A complete basic tutorial of 555 Timer IC.

This article covers every basic aspect of 555 Timer IC. You may already know that SE/NE 555 is a Timer IC introduced by Signetics corporation in 1970′s. In this article we cover the following information about 555 Timer IC.

1. Introduction to 555 Timer IC

2. 555 Timer IC Pin Configuration

3. Basics of 555 Timer

4. Block Diagram

5. Working Principle

6. Download Data Sheet

1. Introduction

555 timer IC

One of the most versatile linear ICs is the 555 timer which was first introduced in early 1970 by Signetic Corporation giving the name as SE/NE 555 timer. This IC is a  monolithic timing circuit that can produce accurate and highly stable time delays or oscillation. Like other commonly used op-amps, this IC is also very much reliable, easy to use and cheaper in cost. It has a variety of applications including monostable and astable multivibrators, dc-dc converters, digital logic probes, waveform generators, analog frequency meters and tachometers, temperature measurement and control devices, voltage regulators etc. The timer basically operates in one of the two modes either as a monostable (one-shot) multivibrator or as an astable (free-running) multivibrator.The SE 555 is designed for the operating temperature range from – 55°C to 125° while the NE 555 operates over a temperature range of 0° to 70°C.

The important features of the 555 timer are :

• It operates from a wide range of power supplies ranging from + 5 Volts to + 18 Volts supply voltage.
• Sinking or sourcing 200 mA of load current.
• The external components should be selected properly so that the timing intervals can be made into several minutes Proper selection of only a few external components allows timing intervals of several minutes along with the frequencies exceeding several hundred kilo hertz.
• It has a high current output; the output can drive TTL.
• It has a temperature stability of 50 parts per million (ppm) per degree Celsius change in temperature, or equivalently 0.005 %/ °C.
• The duty cycle of the timer is adjustable with the maximum power dissipation per package is 600 mW and its trigger and reset inputs are logic compatible.

2. IC Pin Configuration

555 Timer IC Pin Configuration

The 555 Timer IC is available as an 8-pin metal can, an 8-pin mini DIP (dual-in-package) or a 14-pin DIP.

This IC consists of 23 transistors, 2 diodes and 16 resistors. The explanation of terminals coming out of the 555 timer IC is as follows. The pin number used in the following discussion refers to the 8-pin DIP and 8-pin metal can packages.

Pin 1: Grounded Terminal: All the voltages are meas­ured with respect to this terminal.

Pin 2: Trigger Terminal: This pin is an inverting input to a comparator that is responsible for transition of flip-flop from set to reset. The output of the timer depends on the amplitude of the external trigger pulse applied to this pin.

Pin 3: Output Terminal: Output of the timer is avail­able at this pin. There are two ways in which a load can be connected to the output terminal either between pin 3 and ground pin (pin 1) or between pin 3 and supply pin (pin 8). The load connected between pin 3 and ground supply pin is called the normally on load and that connected between pin 3 and ground pin is called the normally off load.

Pin 4: Reset Terminal: To disable or reset the timer a negative pulse is applied to this pin due to which it is referred to as reset terminal. When this pin is not to be used for reset purpose, it should be connected to + V_CC to avoid any possibility of false triggering.

Pin 5: Control Voltage Terminal: The function of this terminal is to control the threshold and trigger levels. Thus either the external voltage or a pot connected to this pin determines the pulse width of the output waveform. The external voltage applied to this pin can also be used to modulate the output waveform. When this pin is not used, it should be connected to ground through a 0.01 micro Farad to avoid any noise problem.

Pin 6: Threshold Terminal: This is the non-inverting input terminal of comparator 1, which compares the voltage applied to the terminal with a reference voltage of 2/3 V_CC. The amplitude of voltage applied to this terminal is responsible for the set state of flip-flop.

Pin 7 : Discharge Terminal: This pin is connected internally to the collector of transistor and mostly a capacitor is connected between this terminal and ground. It is called discharge terminal because when transistor saturates, capacitor discharges through the transistor. When the transistor is cut-off, the capacitor charges at a rate determined by the external resistor and capacitor.

Pin 8: Supply Terminal: A supply voltage of + 5 V to + 18 V is applied to this terminal with respect to ground (pin 1).

3. 555 Timer Basics

The 555 timer combines a relaxation oscillator, two comparators, an R-S flip-flop, and a discharge capacitor.

R-S Flip-Flop: – A pair of cross-coupled transistors is shown in figure. Each collector drives the opposite base through resistance R_B. In such circuit one transistor is saturated while the other is cut-off. For instance, if transistor Q₁ is saturated, its collector voltage is almost zero. So there is no base drive for transistor Q₂ and it goes into cut-off and its collector voltage approaches + V_CC. This high voltage produces enough base current to keep transistor Q₁ in saturation.

On the other hand if transistor Q₁ is cut-off, its collector voltage, which is approximately equal to + V_CC, drives the transistor Q₂ into saturation. The low collector voltage (which is approximately to zero) of this transistor then keeps the transistor Q₂ in cut-off.Depending on which transistor is saturated, the Q output is either low or high. By adding more components to the circuit, an R-S flip-flop is obtained. R-S flip-flop is a circuit that can set the Q output to high or reset it low. Incidentally, a complementary (opposite) output Q is available from the collector of the other transistor.

Figure shows the schematic symbol for an R-S flip-flop of any design. The circuit latches in either two states. A high S input sets Q to high; a high R input resets Q to low. Output Q remains in a given state until it is triggered into the opposite state.

Basic Timing Concept

Figure illustrates some basic ideas that will prove useful in coming blog posts of the 555 timer. Assuming output Q high, the transistor is saturated and the capacitor voltage is clamped at ground i.e. the capacitor C is shorted and cannot charge.

The non-inverting input voltage of the comparator is referred to as the threshold voltage while the inverting input voltage is referred to as the control voltage. With R-S flip flop set, the saturated transistor holds the threshold voltage at zero. The control voltage, however, is fixed at 2/3 V_CC (i.e. at 10 V) because of the voltage divider.

Suppose that a high voltage is applied to the R input. This resets the flip-flop R-Output Q goes low and the transistor is cut-off. Capacitor C is now free to charge. As this capacitor C charges, the threshold voltage rises. Eventually, the threshold voltage becomes slightly greater than (+ 10 V). The output of the comparator then goes high, forcing the R S flip-flop to set. The high Q output saturates the transistor, and this quickly discharges the capacitor. The two waveforms are depicted in figure. An exponential rise is across the capacitor C, and a positive going pulse appears at the output Q. Thus capacitor voltage V_C is exponential while the output is rectangular, as illustrated in figure.

4. Block Diagram

Block Diagram -555 Timer

The block diagram of a 555 timer is shown in the above figure. A 555 timer has two comparators, which are basically 2 op-amps), an R-S flip-flop, two transistors and a resistive network.

• Resistive network consists of three equal resistors and acts as a voltage divider.
• Comparator 1 compares threshold voltage with a reference voltage + 2/3 V_CC volts.
• Comparator 2 compares the trigger voltage with a reference voltage + 1/3 V_CC volts.

Output of both the comparators is supplied to the flip-flop. Flip-flop assumes its state according to the output of the two compa­rators. One of the two transistors is a discharge transis­tor of which collector is connected to pin 7. This tran­sistor saturates or cuts-off according to the output state of the flip-flop. The saturated transis­tor provides a discharge path to a capacitor con­nected externally. Base of another transistor is connected to a reset terminal. A pulse applied to this terminal resets the whole timer irrespective of any input.

5. Working Principle

Refer Block Diagram of 555 timer IC given above:

Comparator 1 has a threshold input (pin 6) and a control input (pin 5). In most applications, the control input is not used, so that the control voltage equals +2/3 V_CC. Output of this comparator is applied to set (S) input of the flip-flop. Whenever the threshold voltage exceeds the control voltage, comparator 1 will set the flip-flop and its output is high. A high output from the flip-flop saturates the discharge transistor and discharge the capacitor connected externally to pin 7. The complementary signal out of the flip-flop goes to pin 3, the output. The output available at pin 3 is low. These conditions will prevail until comparator 2 triggers the flip-flop. Even if the voltage at the threshold input falls below 2/3 V_CC, that is comparator 1 cannot cause the flip-flop to change again. It means that the comparator 1 can only force the flip-flop’s output high.

To change the output of flip-flop to low, the voltage at the trigger input must fall below + 1/3 Vcc. When this occurs, comparator 2 triggers the flip-flop, forcing its output low. The low output from the flip-flop turns the discharge transistor off and forces the power amplifier to output a high. These conditions will continue independent of the voltage on the trigger input. Comparator 2 can only cause the flip-flop to output low.

From the above discussion it is concluded that for the having low output from the timer 555, the voltage on the threshold input must exceed the control voltage or + 2/3 V_CC. They also turn the discharge transistor on. To force the output from the timer high, the voltage on the trigger input must drop below +1/3 V_CC. This also turns the discharge transistor off.

A voltage may be applied to the control input to change the levels at which the switching occurs. When not in use, a 0.01 nano Farad capacitor should be connected between pin 5 and ground to prevent noise coupled onto this pin from causing false triggering.

Connecting the reset (pin 4) to a logic low will place a high on the output of flip-flop. The discharge transistor will go on and the power amplifier will output a low. This condition will continue until reset is taken high. This allows synchronization or resetting of the circuit’s operation. When not in use, reset should be tied to +V_CC.

Download 555 Timer Data Sheet:

To know more about NE/SE 555 timer IC check out/download the datasheet. – NE-SE 555 Timer Datasheet

555 Timer as Monostable Multivibrator

A monostable multivibrator (MMV) often called a one-shot multivibrator, is a pulse generator circuit in which the duration of the pulse is determined by the R-C network,connected externally to the 555 timer. In such a vibrator, one state of output is stable while the other is quasi-stable (unstable). For auto-triggering of output from quasi-stable state to stable state energy is stored by an externally connected capaci­tor C to a reference level. The time taken in storage determines the pulse width. The transition of output from stable state to quasi-stable state is accom­plished by external triggering. The schematic of a 555 timer in monostable mode of operation is shown in figure.

555-timer-monostable-multivibrator

Monostable Multivibrator Circuit details

Pin 1 is grounded. Trigger input is applied to pin 2. In quiescent condition of output this input is kept at + V_CC. To obtain transition of output from stable state to quasi-stable state, a negative-going pulse of narrow width (a width smaller than expected pulse width of output waveform)  and  amplitude of greater than + 2/3 V_CC is applied to pin 2. Output is taken from pin 3. Pin 4 is usually connected to + V_CC to avoid accidental reset. Pin 5 is grounded through a 0.01 u F capacitor to avoid noise problem. Pin 6 (threshold) is shorted to pin 7. A resistor R_A is connected between pins 6 and 8. At pins 7 a discharge capacitor is connected while pin 8 is connected to supply V_CC.

555 IC Monostable Multivibrator Operation.

555 monostable-multivibrator-operation

For explain­ing the operation of timer 555 as a monostable multivibrator, necessary in­ternal circuitry with external connections are shown in figure.

The operation of the circuit is ex­plained below:

Initially, when the output at pin 3 is low i.e. the circuit is in a stable state, the transistor is on and capacitor- C is shorted to ground. When a negative pulse is applied to pin 2, the trigger input falls below +1/3 V_CC, the output of comparator goes high which resets the flip-flop and consequently the transistor turns off and the output at pin 3 goes high. This is the transition of the output from stable to quasi-stable state, as shown in figure. As the discharge transistor is cut­off, the capacitor C begins charging toward +V_CC through resistance R_A with a time constant equal to R_AC. When the increasing capacitor voltage becomes slightly greater than +2/3 V_CC, the output of comparator 1 goes high, which sets the flip-flop. The transistor goes to saturation, thereby discharging the capacitor C and the output of the timer goes low, as illustrated in figure.

Thus the output returns back to stable state from quasi-stable state.

The output of the Monostable Multivibrator remains low until a trigger pulse is again applied. Then the cycle repeats. Trigger input, output voltage and capacitor voltage waveforms are shown in figure.

Monostable Multivibrator Design Using 555 timer IC

The capacitor C has to charge through resistance R_A. The larger the time constant R_AC, the longer it takes for the capacitor voltage to reach +2/3V_CC.

In other words, the RC time constant controls the width of the output pulse. The time during which the timer output remains high is given as

t_p = 1.0986 R_AC
where R_A is in ohms and C is in farads. The above relation is derived as below. Voltage across the capacitor at any instant during charging period is given as

v_c = V_CC (1- e^-t/R_AC)

Substituting v_c = 2/3 V_CC in above equation we get the time taken by the capacitor to charge from 0 to +2/3V_CC.

So +2/3V_CC. = V_CC. (1 – e^-t/RAC)   or   t – R_AC log_e 3 = 1.0986 R_AC

So pulse width, t_P = 1.0986 R_AC s 1.1 R_AC

The pulse width of the circuit may range from micro-seconds to many seconds. This circuit is widely used in industry for many different timing applications.

555 Timer Oscillator

A voltage-controlled oscillator (VCO) using the timer 555 is shown in figure.

555-timer-voltage-controlled-oscillator

The circuit is sometimes called a voltage-to-frequency converter because the output frequency can be changed by changing the input voltage.

As discussed in previous blog posts, pin 5 terminal is voltage control terminal and its function is  to control the threshold and trigger levels. Normally, the control voltage is ++2/3V_CC because of the internal voltage divider. However, an external voltage can be applied to this terminal directly or through a pot, as illustrated in figure, and by adjusting the pot, control voltage can be varied. Voltage across the timing capacitor is depicted in figure, which varies between +V_control and ½ V_control. If control voltage is increased, the capacitor takes a longer to charge and discharge; the frequency, therefore, decreases. Thus the fre­quency can be changed by changing the control volt­age. Incidentally, the control voltage may be made available through a pot, or it may be output of a transistor circuit, op-amp, or some other device.

Police siren using NE555

Description.

A lot of electronic circuits using NE555 timer IC are already published here and this is just another one.Here is the circuit diagram of a police siren based on NE55 timer IC. The circuit uses two NE555 timers ICs and each of them are wired as astable multivibrators.The circuit can be powered from anything between 6 to 15V DC and is fairly loud.By connecting an additional power amplifier at the output you can further increase the loudness.

IC1 is wired as a slow astable multivibrator operating at around 20Hz @ 50% duty cycle and IC2 is wired as fast astable multivibrator operating at around 600Hz.The output of first astable mutivibrator is connected to the control voltage input (pin5) of IC2. This makes the output of IC2 modulated by the output frequency of IC1, giving a siren effect. In simple words, the output frequency of IC2 is controlled by the output of IC1.

Circuit diagram.

Notes.

• The circuit can be assembled on a Perf board.
• I used 12V DC for powering the circuit.
• Instead of using two NE55 timer ICs, you can also use a single NE556 timer.
• NE556 is nothing but two NE555 ICs in one package.
• Refer the datasheets of NE555 and NE556 to have a clear idea.
• Speaker can be a 64ohm, 500mW one.

555 Timer-Ramp Generator

Ramp Generator Circuit-using 555 Timer IC

We know that if a capacitor is charged from a voltage source through a resistor, an exponential waveform is produced while charging of a capaci­tor from a constant current source produces a ramp. This is the idea behind the circuit. The circuit of a ramp generator using timer 555 is shown in figure. Here the resistor of previ­ous circuits is replaced by a PNP transistor that produces a constant charging current.

Ramp Generator Circuit

Charging current produced by PNP constant current source is

i_C = Vcc-V_E / R_E

where V_E = R₂ / (R1 + R2) * V_CC + V_BE

When a trigger starts the monostable multivibrator timer 555 as shown in figure, the PNP current source forces a constant charging into the capacitor C. The voltage across the capacitor is, therefore, a ramp as illustrated in the figure. The slope of the ramp is given as

Slope, s = I/C

Positive voltage to negative voltage converter

Description.
This circuit diagram shows how to obtain a negative voltage from a positive voltage supply. Another advantage of this circuit is that, the negative voltage together with the original positive supply can be used to simulate a dual supply. The circuit is based on timer IC NE555. The NE555 is wired as an astable multivibrator operating at around 1 KHz. The square wave output if available at pin no 3 of the IC. During the positive half of the square wave, capacitor C3 charges through diode D2.When the output of IC is at zero the C3 discharges through diode D2 and the capacitor C4 gets charged. As a result of this the voltage at the junction of the anode of D1 and cathode of C4 will be always negative with respect to the ground.
Circuit diagram.

Notes.

• Assemble the circuit on a Vero board.
• The IC1 must be mounted on a holder.
• C3 and C4 must be rated at least 25V.
• Do not connect loads that consume more than 50mA current.
• The negative voltage output will be always a few volts lower than the positive supply.

High voltage generator circuit

Description.
First of all let me remind you that this circuit is a very dangerous one. The output voltage of this circuit is in Kilo volts and it can seriously injure you or kill you. Try this circuit only if you have enough experience dealing with high voltages. I have no responsibility on any hazards caused by the circuit. Be very careful. This is a humble request.

The circuit given here has three sections namely oscillator, switching stage and a step up stage. The oscillator is build around a NE555 timer operating at 25 KHz. The output of the NE555 coupled to the base of the power transistor TIP3055 which is the switching device. The power transistor drives primary of the step up transformer at 25 KHz and as a result a high voltage will be induced across its secondary.
Circuit diagram.

Notes.

• A 12V lead acid battery can be used for powering the circuit.
• TIP3055 must be mounted on a heat sink.
• T1 can be an EHT (extra high tension) transformer used in television sets.
• For an EHT from 20inch TV, the output voltage will be 8 to 10 KV @12V supply voltage.
• This circuit is not an efficient one and is not suitable for any serious applications.
• Once again, be very careful with this circuit!.